Regviz

Cypress Semiconductor /psoc63 /FLASHC /FM_CTL /CAL_CTL3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CAL_CTL3

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Cypress Semiconductor/psoc63/FLASHC/FM_CTL/CAL_CTL3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OSC_TRIM_HV 0 (OSC_RANGE_TRIM_HV)OSC_RANGE_TRIM_HV 0IDAC_HV0SDAC_HV 0ITIM_HV0 (VDDHI_HV)VDDHI_HV 0TURBO_PULSEW_HV 0 (BGLO_EN_HV)BGLO_EN_HV 0 (BGHI_EN_HV)BGHI_EN_HV

Description

Cal control osc trim bits, idac, sdac, itim, bdac.

Fields

OSC_TRIM_HV

Flash macro pump clock trim control.
OSC_RANGE_TRIM_HV

0: Oscillator High Frequency Range 1: Oscillator Low Frequency range
IDAC_HV

N/A
SDAC_HV

N/A
ITIM_HV

Trimming of timing current
VDDHI_HV

0’: vdd<2.3V ‘1’: vdd>=2.3V
TURBO_PULSEW_HV

Turbo pulse width trim
BGLO_EN_HV

LO Bandgap Enable
BGHI_EN_HV

HI Bandgap Enable

Links

()

Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data